1. Field of the Invention
This invention relates in general to means and methods for stabilizing the properties of polycrystalline semiconductor layers and, more particularly, to means and method for controlling dopant migration in polycrystalline semiconductor layers during high temperature processing.
2. Background Art
Electronic devices using polycrystalline semiconductor regions often exhibit degradation associated with dopant migration in the polycrystalline material. For example, when polycrystalline silicon is employed, the polycrystalline material is often implanted with large concentrations of dopants, such as for example arsenic, boron, or phosphorous, because a low value of sheet resistance is desired. High temperatures often are used to activate the implanted dopant. The dopant will distribute very rapidly in the polycrystalline layer during such heat treatment. Under certain circumstances, dopant concentration peaks occur at poly-oxide interfaces. High dopant concentrations are known to result in oxide degradation. This is particularly troublesome when the oxide is very thin as is often the case with high performance devices, particularly MOS devices employing thin gate oxides.
While this problem may be partially overcome by reducing the dopant concentration, the lower dopant values often make it impossible to obtain sufficiently low sheet resistance. Also, where it is desired to selectively dope poly regions in one location but not in an adjacent location, the rapid vertical and/or lateral movement of the dopant through the poly material during high temperature processing may make it impossible to obtain the desired localization of doping. Thus, a need continues to exist for improved means and methods for overcoming these and other problems arising in connection with polycrystalline semiconductor layers.
Accordingly, it is an objective of the present invention to provide improved means and methods for controlling redistribution of dopants in polycrystalline semiconductor layers or regions.
It is a further object of the present invention to provide improved means and methods for preventing excess or unwanted lateral diffusion of dopants in polycrystalline semiconductor layers.
It is an additional object of the present invention to provide improved means and methods for preventing excess or unwanted vertical diffusion of dopants in polycrystalline semiconductor layers.
It is an additional object of the present invention to prevent grain boundaries from absorbing and rendering electrically inactive substantial amounts of dopant.
As used herein the words "dopant" or "doping" are intended to refer to the class of impurities which provide substantial number of shallow donor or acceptor levels in the semiconductor so as to substantially alter the conductivity of the material. In the case of silicon materials, examples of this class of dopants are arsenic, boron, phosphorous, antimony, aluminum, gallium, and indium. Those of skill in the art will understand that other such dopant elements exist for use in silicon and other semiconductor materials. Oxygen and nitrogen or mixtures thereof do not substantially alter the conductivity of silicon and thus, for silicon, are not within the definition of the word "dopant" as used herein.
As used herein, the word "substrate" is intended to refer to any type of supporting means whether semiconductor or insulator or metal or combinations thereof. As used herein the words "high temperature" are intended to refer to temperatures where the phenomena of interest are proceeding at a rate significant compared to the time periods of interest. For example, for dopant migration or oxidation of silicon, this is generally about a 1000 degrees C. Those of skill in the art will understand that different temperatures will apply for different materials and phenomena. As used herein the words "dopant ions" are intended to include neutral atoms of the same species, as for example result from implantation of dopant ions into solid materials.